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SANTA CLARA, Calif.--(BUSINESS WIRE)--Sept. 24, 2001-- Delivering five DSM tapeouts in less than six months required more than just the standard EDA flow according to AMCC VLSI director, George Serhan, who used a set of complementary tools from Sequence Design, Inc., the SoC Design Closure Company, to realize ``big time'' improvements in the time spent going from netlist to tapeout.

``For one chip we would sometimes spend four to six months getting to tapeout,'' Serhan said. ``With PhysicalStudio we can do it in a much shorter time period with excellent results.'' AMCC, a leading manufacturer of semiconductors for high-speed and optical networking applications, used Sequence tools to design a series of sophisticated very deep submicron ICs (0.13 micron to 0.18 micron feature sizes) for optical network switching and processing.

Sequence's PhysicalStudio(TM) optimizes chip timing and signal integrity issues concurrently, both before and after routing. It is fully interoperable with industry-standard routing tools, permitting existing physical design flows to reach fast, predictable SoC design closure in silicon geometries below 180 nanometers.

``With these types of very deep submicron designs, interconnect delay is dominant and doing routing before optimization is critical,'' Serhan said. ``PhysicalStudio's hierarchical design methodology, and pre- and post-route optimization techniques, have enabled us to achieve very quick timing convergence.''

About PhysicalStudio

PhysicalStudio allows system-on-chip designers to:

• reach 15-35% higher clock speeds
• achieve a 5-15% reduction in power over traditional physical design flows
• compensate for signal integrity effects, such as crosstalk-induced ``setup'' violations, ``hold'' violations and functional ``glitch'' errors
• accurately predict and immunize against noise during placement
• surgically correct timing and signal-integrity issues ``along the route'' using a patent-pending FullContext(TM)post-route technique

By unifying placement-driven optimization and post-route optimization into a single engine, the product ensures that every net in a design is correctly driven and all timing and signal integrity violations are eliminated. PhysicalStudio operates on large, hierarchical designs with varying abstractions at the top-level such as register-bounded blocks, STAMP, LIB and CLF.

``Customers adding PhysicalStudio to their existing flows know what AMCC is talking about,'' said Kevin Walsh, vice president of product management for Sequence Design. ``We are rewriting the rules on time to market with this product.''

Pricing and Availability

PhysicalStudio is available now from Sequence Design and augments existing design flows, including physical synthesis tools from Cadence, Avant! and Synopsys. PhysicalStudio replaces the previous Sapphire and Sequence products FormIT, NoiseIT and Copernicus. Typical configurations start at $175,000 (U.S.) for a one-year license.

About SoC Design Closure

Silicon processing technology below 180 nanometers creates chips offering unprecedented performance combined with low power consumption.

However, existing physical design methodologies and tools have difficulty delivering on this potential, because of complex interactions between the logic and interconnect in the chip. As designers struggle to achieve timing convergence, they invariably encounter schedule delays. The analysis-based optimization solutions offered by Sequence achieve the power and signal integrity goals set during the architectural stages of a design and thereby eliminate schedule delays.

SoC design closure solutions from Sequence drop seamlessly into existing design flows, protecting previous tool investment while reducing time-to-market.

Sequence Design is the first EDA company to focus comprehensively on SoC design closure, from the architectural handoff all the way through logical and physical implementation and final verification.

About AMCC

AMCC designs, develops, manufactures, and markets high-performance, high-bandwidth silicon solutions for the world's optical networks. AMCC utilizes a combination of high-frequency analog, mixed-signal and digital design expertise coupled with system-level knowledge and multiple silicon process technologies to offer integrated circuit products that enable the transport of voice and data over fiber optic networks. The company's system solution portfolio includes PMD, PHY, framer/mapper, network processor, traffic management and switch fabric devices that address the high-performance needs of the evolving intelligent optical network. AMCC's corporate headquarters and wafer fabrication facilities are located in San Diego, California. Sales and engineering offices are located throughout the world.

About Sequence

Sequence Design, Inc., the SoC Design Closure Company(SM), enables system-on-chip designers to bring higher-performance and lower-power integrated circuits quickly to tape out. Sequence's physical design software and solutions give its more than 90 customers the competitive advantage they need to excel in aggressive technology markets, despite demanding complexity and time-to-market issues.

Sequence has worldwide development and field service operations. The company was formed through the merger of Sente, Inc., Sapphire Design Automation, Inc. and Frequency Technology. Sequence is privately held. Sequence is a member of Cadence Design Systems' Connections(TM) and Mentor Graphics' Open Door(TM) partnership programs. Please visit our web site at www.sequencedesign.com.

All trademarks mentioned herein are the property of their respective owners.

     Nanette Collins
     Sequence Design Inc.
     (617) 437-1822
     nanette@nvc.com
      or
     Greg Fawcett
     Sequence Design Inc.
     (408) 961-2365
     gfawcett@sequencedesign.com